feat: generate assembly from main
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1ce36dd8da
commit
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15E168A8B332382C
src
@ -64,157 +64,8 @@ def frontend(
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}
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val s = "enter an integer to echo"
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def backend(typedProg: microWacc.Program): List[asm.AsmLine] | String =
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typedProg match {
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case microWacc.Program(
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Nil,
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microWacc.Call(microWacc.Builtin.Exit, microWacc.IntLiter(v) :: Nil) :: Nil
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) =>
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s""".intel_syntax noprefix
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.globl main
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main:
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mov edi, ${v}
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call exit@plt
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"""
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case microWacc.Program(
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Nil,
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microWacc.Assign(microWacc.Ident("x", _), microWacc.IntLiter(1)) ::
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microWacc.Call(microWacc.Builtin.Println, _) ::
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microWacc.Assign(
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microWacc.Ident("x", _),
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microWacc.Call(microWacc.Builtin.ReadInt, Nil)
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) ::
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microWacc.Call(microWacc.Builtin.Println, microWacc.Ident("x", _) :: Nil) :: Nil
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) =>
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""".intel_syntax noprefix
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.globl main
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.section .rodata
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# length of .L.str0
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.int 24
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.L.str0:
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.asciz "enter an integer to echo"
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.text
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main:
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push rbp
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# push {rbx, r12}
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sub rsp, 16
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mov qword ptr [rsp], rbx
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mov qword ptr [rsp + 8], r12
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mov rbp, rsp
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mov r12d, 1
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lea rdi, [rip + .L.str0]
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# statement primitives do not return results (but will clobber r0/rax)
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call _prints
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call _println
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# load the current value in the destination of the read so it supports defaults
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mov edi, r12d
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call _readi
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mov r12d, eax
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mov edi, eax
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# statement primitives do not return results (but will clobber r0/rax)
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call _printi
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call _println
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mov rax, 0
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# pop/peek {rbx, r12}
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mov rbx, qword ptr [rsp]
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mov r12, qword ptr [rsp + 8]
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add rsp, 16
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pop rbp
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ret
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.section .rodata
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# length of .L._printi_str0
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.int 2
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.L._printi_str0:
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.asciz "%d"
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.text
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_printi:
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push rbp
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mov rbp, rsp
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# external calls must be stack-aligned to 16 bytes, accomplished by masking with fffffffffffffff0
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and rsp, -16
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mov esi, edi
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lea rdi, [rip + .L._printi_str0]
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# on x86, al represents the number of SIMD registers used as variadic arguments
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mov al, 0
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call printf@plt
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mov rdi, 0
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call fflush@plt
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mov rsp, rbp
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pop rbp
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ret
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.section .rodata
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# length of .L._prints_str0
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.int 4
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.L._prints_str0:
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.asciz "%.*s"
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.text
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_prints:
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push rbp
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mov rbp, rsp
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# external calls must be stack-aligned to 16 bytes, accomplished by masking with fffffffffffffff0
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and rsp, -16
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mov rdx, rdi
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mov esi, dword ptr [rdi - 4]
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lea rdi, [rip + .L._prints_str0]
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# on x86, al represents the number of SIMD registers used as variadic arguments
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mov al, 0
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call printf@plt
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mov rdi, 0
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call fflush@plt
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mov rsp, rbp
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pop rbp
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ret
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.section .rodata
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# length of .L._println_str0
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.int 0
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.L._println_str0:
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.asciz ""
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.text
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_println:
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push rbp
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mov rbp, rsp
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# external calls must be stack-aligned to 16 bytes, accomplished by masking with fffffffffffffff0
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and rsp, -16
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lea rdi, [rip + .L._println_str0]
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call puts@plt
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mov rdi, 0
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call fflush@plt
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mov rsp, rbp
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pop rbp
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ret
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.section .rodata
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# length of .L._readi_str0
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.int 2
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.L._readi_str0:
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.asciz "%d"
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.text
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_readi:
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push rbp
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mov rbp, rsp
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# external calls must be stack-aligned to 16 bytes, accomplished by masking with fffffffffffffff0
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and rsp, -16
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# RDI contains the "original" value of the destination of the read
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# allocate space on the stack to store the read: preserve alignment!
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# the passed default argument should be stored in case of EOF
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sub rsp, 16
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mov dword ptr [rsp], edi
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lea rsi, qword ptr [rsp]
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lea rdi, [rip + .L._readi_str0]
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# on x86, al represents the number of SIMD registers used as variadic arguments
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mov al, 0
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call scanf@plt
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mov eax, dword ptr [rsp]
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add rsp, 16
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mov rsp, rbp
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pop rbp
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ret
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"""
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case _ => List()
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}
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def backend(typedProg: microWacc.Program): List[asm.AsmLine] =
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asmGenerator.generateAsm(typedProg)
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def compile(filename: String, outFile: Option[File] = None)(using
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stdout: PrintStream = Console.out
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@ -222,13 +73,8 @@ def compile(filename: String, outFile: Option[File] = None)(using
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frontend(os.read(os.Path(filename))) match {
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case Left(typedProg) =>
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val asmFile = outFile.getOrElse(File(filename.stripSuffix(".wacc") + ".s"))
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backend(typedProg) match {
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case s: String =>
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os.write.over(os.Path(asmFile.getAbsolutePath), s)
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case ops: List[asm.AsmLine] => {
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writer.writeTo(ops, PrintStream(asmFile))
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}
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}
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val asm = backend(typedProg)
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writer.writeTo(asm, PrintStream(asmFile))
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0
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case Right(exitCode) => exitCode
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}
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@ -81,13 +81,14 @@ class ParallelExamplesSpec extends AnyFlatSpec with BeforeAndAfterAll with Paral
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// disable formatting to avoid binPack
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"^.*wacc-examples/valid/advanced.*$",
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"^.*wacc-examples/valid/array.*$",
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"^.*wacc-examples/valid/basic/exit.*$",
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"^.*wacc-examples/valid/basic/skip.*$",
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"^.*wacc-examples/valid/expressions.*$",
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"^.*wacc-examples/valid/function/nested_functions.*$",
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"^.*wacc-examples/valid/function/simple_functions.*$",
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"^.*wacc-examples/valid/if.*$",
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"^.*wacc-examples/valid/IO/print.*$",
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"^.*wacc-examples/valid/IO/read(?!echoInt\\.wacc).*$",
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"^.*wacc-examples/valid/IO/read.*$",
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"^.*wacc-examples/valid/IO/IOLoop.wacc.*$",
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"^.*wacc-examples/valid/IO/IOSequence.wacc.*$",
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"^.*wacc-examples/valid/pairs.*$",
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