style: improve code formatting and consistency in typeChecker and assemblyIR
This commit is contained in:
Guy C
parent
1488281223
commit
f30cf42c4b
@ -19,7 +19,7 @@ object asmGenerator {
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val RBP = Register(RegSize.R64, RegName.BP)
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val RSI = Register(RegSize.R64, RegName.SI)
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val _8_BIT_MASK = 0xFF
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val _8_BIT_MASK = 0xff
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object labelGenerator {
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var labelVal = -1
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@ -27,8 +27,8 @@ object asmGenerator {
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labelVal += 1
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s".L$labelVal"
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}
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def getLabel(target: CallTarget): String = target match{
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case Ident(v,_) => s"wacc_$v"
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def getLabel(target: CallTarget): String = target match {
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case Ident(v, _) => s"wacc_$v"
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case Builtin(name) => s"_$name"
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}
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}
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@ -61,33 +61,31 @@ object asmGenerator {
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strings: ListBuffer[String]
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): List[AsmLine] = {
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LabelDef(labelName) ::
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funcPrologue() ++
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funcPrologue() ++
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funcBody ++
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funcEpilogue()
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funcEpilogue()
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}
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def generateBuiltInFuncs()(using
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stack: LinkedHashMap[Ident, Int],
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strings: ListBuffer[String]
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): List[AsmLine] = {
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wrapFunc(labelGenerator.getLabel(Builtin.Exit),
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wrapFunc(
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labelGenerator.getLabel(Builtin.Exit),
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alignStack() ++
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List(Pop(RDI),
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assemblyIR.Call(CLibFunc.Exit))
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List(Pop(RDI), assemblyIR.Call(CLibFunc.Exit))
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) ++
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wrapFunc(labelGenerator.getLabel(Builtin.Printf),
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alignStack() ++
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List(assemblyIR.Call(CLibFunc.PrintF),
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Move(RDI, ImmediateVal(0)),
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assemblyIR.Call(CLibFunc.Fflush)
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)
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)++
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wrapFunc(labelGenerator.getLabel(Builtin.Malloc),
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List()
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)++
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wrapFunc(labelGenerator.getLabel(Builtin.Free),
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List()
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)
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wrapFunc(
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labelGenerator.getLabel(Builtin.Printf),
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alignStack() ++
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List(
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assemblyIR.Call(CLibFunc.PrintF),
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Move(RDI, ImmediateVal(0)),
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assemblyIR.Call(CLibFunc.Fflush)
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)
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) ++
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wrapFunc(labelGenerator.getLabel(Builtin.Malloc), List()) ++
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wrapFunc(labelGenerator.getLabel(Builtin.Free), List())
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}
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def generateStmt(
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@ -95,7 +93,7 @@ object asmGenerator {
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)(using stack: LinkedHashMap[Ident, Int], strings: ListBuffer[String]): List[AsmLine] =
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stmt match {
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case microWacc.Call(Builtin.Exit, code :: _) =>
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List()
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List()
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case Assign(lhs, rhs) =>
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var dest: IndexAddress =
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IndexAddress(RSP, 0) // gets overrwitten
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@ -188,97 +186,100 @@ object asmGenerator {
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// TODO other array types
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case _ => List()
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}
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case BoolLiter(v) => List(Push(ImmediateVal(if (v) 1 else 0)))
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case NullLiter() => List(Push(ImmediateVal(0)))
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case BoolLiter(v) => List(Push(ImmediateVal(if (v) 1 else 0)))
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case NullLiter() => List(Push(ImmediateVal(0)))
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case ArrayElem(value, indices) => List()
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case UnaryOp(x, op) => op match {
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// TODO: chr and ord are TYPE CASTS. They do not change the internal value,
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// but will need bound checking e.t.c.
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case UnaryOperator.Chr => List()
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case UnaryOperator.Ord => List()
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case UnaryOperator.Len => List()
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case UnaryOperator.Negate => List(
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Negate(MemLocation(RSP,SizeDir.Word))
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)
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case UnaryOperator.Not =>
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evalExprOntoStack(x) ++
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List(
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Xor(MemLocation(RSP, SizeDir.Word), ImmediateVal(1))
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)
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}
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case BinaryOp(x, y, op) => op match {
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case BinaryOperator.Add =>
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evalExprOntoStack(x) ++
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evalExprOntoStack(y) ++
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List(
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Pop(EAX),
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Add(MemLocation(RSP, SizeDir.Word), EAX)
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// TODO OVERFLOWING
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)
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case BinaryOperator.Sub =>
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evalExprOntoStack(x) ++
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evalExprOntoStack(y) ++
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List(
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Pop(EAX),
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Subtract(MemLocation(RSP, SizeDir.Word), EAX)
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// TODO OVERFLOWING
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)
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case BinaryOperator.Mul =>
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evalExprOntoStack(x) ++
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evalExprOntoStack(y) ++
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List(
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Pop(EAX),
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Multiply(MemLocation(RSP, SizeDir.Word), EAX)
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// TODO OVERFLOWING
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)
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case BinaryOperator.Div =>
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evalExprOntoStack(y) ++
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evalExprOntoStack(x) ++
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List(
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Pop(EAX),
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Divide(MemLocation(RSP, SizeDir.Word)),
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Add(RSP, ImmediateVal(8)),
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Push(EAX)
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// TODO CHECK DIVISOR IS NOT 0
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)
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case BinaryOperator.Mod =>
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evalExprOntoStack(y) ++
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evalExprOntoStack(x) ++
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List(
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Pop(EAX),
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Divide(MemLocation(RSP, SizeDir.Word)),
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Add(RSP, ImmediateVal(8)),
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Push(EDX)
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// TODO CHECK DIVISOR IS NOT 0
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case UnaryOp(x, op) =>
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op match {
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// TODO: chr and ord are TYPE CASTS. They do not change the internal value,
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// but will need bound checking e.t.c.
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case UnaryOperator.Chr => List()
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case UnaryOperator.Ord => List()
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case UnaryOperator.Len => List()
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case UnaryOperator.Negate =>
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List(
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Negate(MemLocation(RSP, SizeDir.Word))
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)
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case BinaryOperator.Eq =>
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generateComparison(x, y, Cond.Equal)
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case BinaryOperator.Neq =>
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generateComparison(x, y, Cond.NotEqual)
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case BinaryOperator.Greater =>
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generateComparison(x, y, Cond.Greater)
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case BinaryOperator.GreaterEq =>
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generateComparison(x, y, Cond.GreaterEqual)
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case BinaryOperator.Less =>
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generateComparison(x, y, Cond.Less)
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case BinaryOperator.LessEq =>
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generateComparison(x, y, Cond.LessEqual)
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case BinaryOperator.And =>
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evalExprOntoStack(x) ++
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evalExprOntoStack(y) ++
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List(
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Pop(EAX),
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And(MemLocation(RSP, SizeDir.Word), EAX),
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)
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case BinaryOperator.Or =>
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evalExprOntoStack(x) ++
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evalExprOntoStack(y) ++
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List(
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Pop(EAX),
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Or(MemLocation(RSP, SizeDir.Word), EAX),
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)
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}
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case UnaryOperator.Not =>
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evalExprOntoStack(x) ++
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List(
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Xor(MemLocation(RSP, SizeDir.Word), ImmediateVal(1))
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)
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}
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case BinaryOp(x, y, op) =>
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op match {
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case BinaryOperator.Add =>
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evalExprOntoStack(x) ++
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evalExprOntoStack(y) ++
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List(
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Pop(EAX),
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Add(MemLocation(RSP, SizeDir.Word), EAX)
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// TODO OVERFLOWING
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)
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case BinaryOperator.Sub =>
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evalExprOntoStack(x) ++
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evalExprOntoStack(y) ++
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List(
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Pop(EAX),
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Subtract(MemLocation(RSP, SizeDir.Word), EAX)
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// TODO OVERFLOWING
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)
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case BinaryOperator.Mul =>
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evalExprOntoStack(x) ++
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evalExprOntoStack(y) ++
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List(
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Pop(EAX),
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Multiply(MemLocation(RSP, SizeDir.Word), EAX)
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// TODO OVERFLOWING
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)
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case BinaryOperator.Div =>
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evalExprOntoStack(y) ++
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evalExprOntoStack(x) ++
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List(
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Pop(EAX),
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Divide(MemLocation(RSP, SizeDir.Word)),
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Add(RSP, ImmediateVal(8)),
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Push(EAX)
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// TODO CHECK DIVISOR IS NOT 0
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)
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case BinaryOperator.Mod =>
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evalExprOntoStack(y) ++
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evalExprOntoStack(x) ++
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List(
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Pop(EAX),
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Divide(MemLocation(RSP, SizeDir.Word)),
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Add(RSP, ImmediateVal(8)),
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Push(EDX)
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// TODO CHECK DIVISOR IS NOT 0
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)
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case BinaryOperator.Eq =>
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generateComparison(x, y, Cond.Equal)
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case BinaryOperator.Neq =>
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generateComparison(x, y, Cond.NotEqual)
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case BinaryOperator.Greater =>
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generateComparison(x, y, Cond.Greater)
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case BinaryOperator.GreaterEq =>
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generateComparison(x, y, Cond.GreaterEqual)
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case BinaryOperator.Less =>
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generateComparison(x, y, Cond.Less)
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case BinaryOperator.LessEq =>
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generateComparison(x, y, Cond.LessEqual)
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case BinaryOperator.And =>
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evalExprOntoStack(x) ++
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evalExprOntoStack(y) ++
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List(
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Pop(EAX),
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And(MemLocation(RSP, SizeDir.Word), EAX)
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)
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case BinaryOperator.Or =>
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evalExprOntoStack(x) ++
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evalExprOntoStack(y) ++
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List(
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Pop(EAX),
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Or(MemLocation(RSP, SizeDir.Word), EAX)
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)
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}
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case microWacc.Call(target, args) => List()
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}
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}
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@ -308,19 +309,19 @@ object asmGenerator {
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// }
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def generateComparison(x : Expr, y: Expr, cond: Cond)(using
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def generateComparison(x: Expr, y: Expr, cond: Cond)(using
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stack: LinkedHashMap[Ident, Int],
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strings: ListBuffer[String]
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): List[AsmLine] = {
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evalExprOntoStack(x) ++
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evalExprOntoStack(y) ++
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List(
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Pop(EAX),
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Compare(MemLocation(RSP, SizeDir.Word), EAX),
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Set(Register(RegSize.Byte, RegName.AL), cond),
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And(EAX, ImmediateVal(_8_BIT_MASK)),
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Push(EAX)
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)
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evalExprOntoStack(x) ++
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evalExprOntoStack(y) ++
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List(
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Pop(EAX),
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Compare(MemLocation(RSP, SizeDir.Word), EAX),
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Set(Register(RegSize.Byte, RegName.AL), cond),
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And(EAX, ImmediateVal(_8_BIT_MASK)),
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Push(EAX)
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)
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}
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def accessVar(ident: Ident)(using stack: LinkedHashMap[Ident, Int]): IndexAddress =
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IndexAddress(RSP, (stack.size - stack(ident)) * 8)
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@ -397,8 +398,8 @@ object asmGenerator {
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)
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} else {
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evalExprOntoStack(expr) ++
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List(Pop(RSI))
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evalExprOntoStack(expr) ++
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List(Pop(RSI))
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})
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// print the value
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++
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@ -12,14 +12,15 @@ object assemblyIR {
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case Byte
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override def toString = this match {
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case R64 => "r"
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case E32 => "e"
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case R64 => "r"
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case E32 => "e"
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case Byte => ""
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}
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}
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enum RegName {
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case AX, AL, BX, CX, DX, SI, DI, SP, BP, IP, Reg8, Reg9, Reg10, Reg11, Reg12, Reg13, Reg14, Reg15
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case AX, AL, BX, CX, DX, SI, DI, SP, BP, IP, Reg8, Reg9, Reg10, Reg11, Reg12, Reg13, Reg14,
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Reg15
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override def toString = this match {
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case AX => "ax"
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case AL => "al"
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@ -59,17 +60,24 @@ object assemblyIR {
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}
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}
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//TODO register naming conventions are wrong
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// TODO register naming conventions are wrong
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case class Register(size: RegSize, name: RegName) extends Dest with Src {
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override def toString = s"${size}${name}"
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}
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case class MemLocation(pointer: Long | Register, opSize: SizeDir = SizeDir.Unspecified) extends Dest with Src {
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case class MemLocation(pointer: Long | Register, opSize: SizeDir = SizeDir.Unspecified)
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extends Dest
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with Src {
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override def toString = pointer match {
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case hex: Long => opSize.toString + f"[0x$hex%X]"
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case reg: Register => opSize.toString + s"[$reg]"
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}
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}
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case class IndexAddress(base: Register, offset: Int | LabelArg, opSize: SizeDir = SizeDir.Unspecified) extends Dest with Src {
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case class IndexAddress(
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base: Register,
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offset: Int | LabelArg,
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opSize: SizeDir = SizeDir.Unspecified
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) extends Dest
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with Src {
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override def toString = s"$opSize[$base + $offset]"
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}
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@ -111,7 +119,7 @@ object assemblyIR {
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extends Operation(s"j${condition.toString}", op1)
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case class Set(op1: Dest, condition: Cond = Cond.Always)
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extends Operation(s"set${condition.toString}", op1)
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extends Operation(s"set${condition.toString}", op1)
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case class LabelDef(name: String) extends AsmLine {
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override def toString = s"$name:"
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@ -170,8 +178,8 @@ object assemblyIR {
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private val ptr = "ptr "
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override def toString(): String = this match {
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case Byte => "byte " + ptr
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case Word => "word " + ptr
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case Byte => "byte " + ptr
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case Word => "word " + ptr
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case Unspecified => ""
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}
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}
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@ -180,7 +180,7 @@ object typeChecker {
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microWacc.Builtin.Read,
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List(
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destTy match {
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case KnownType.Int => "%d".toMicroWaccCharArray
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case KnownType.Int => "%d".toMicroWaccCharArray
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case KnownType.Char | _ => "%c".toMicroWaccCharArray
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},
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destTyped
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@ -218,9 +218,9 @@ object typeChecker {
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val exprTyped = checkValue(expr, Constraint.Unconstrained)
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val format = exprTyped.ty match {
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case KnownType.Bool | KnownType.String => "%s"
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case KnownType.Char => "%c"
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case KnownType.Int => "%d"
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case _ => "%p"
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case KnownType.Char => "%c"
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case KnownType.Int => "%d"
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case _ => "%p"
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}
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List(
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microWacc.Call(
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