style: reformatted to pass stylecheck

src/main/wacc/backend/assemblyIR.scala

@@ -20,13 +20,13 @@ object assemblyIR {
     }
   }
 
-  //arguments
+  // arguments
   enum CLibFunc extends Operand {
     case Scanf,
-    Puts,
-    Fflush,
-    Exit,
-    PrintF
+      Puts,
+      Fflush,
+      Exit,
+      PrintF
 
     private val plt = "@plt"
 
@@ -43,13 +43,13 @@ object assemblyIR {
     case Named(name: String, size: RegSize)
     case Scratch(num: Int, size: RegSize)
     override def toString = this match {
-      case Named(name, size) => s"${size}${name.toLowerCase()}"
+      case Named(name, size)  => s"${size}${name.toLowerCase()}"
       case Scratch(num, size) => s"${size}${num}"
     }
   }
   case class MemLocation(pointer: Long | Register) extends Dest with Src {
     override def toString = pointer match {
-      case hex: Long => f"[0x$hex%X]"
+      case hex: Long     => f"[0x$hex%X]"
       case reg: Register => s"[$reg]"
     }
   }
@@ -62,7 +62,7 @@ object assemblyIR {
     override def toString = name
   }
 
-  //TODO Check if dest and src are not both memory locations
+  // TODO Check if dest and src are not both memory locations
   abstract class Operation(ins: String, op1: Operand = NoOperand, op2: Operand = NoOperand) {
     override def toString: String = if (op2 == NoOperand) {
       s"$ins ${op1.toString}"
@@ -79,7 +79,7 @@ object assemblyIR {
   case class Or(op1: Dest, op2: Src) extends Operation("or", op1, op2)
   case class Compare(op1: Dest, op2: Src) extends Operation("cmp", op1, op2)
 
-  //stack operations
+  // stack operations
   case class Push(op1: Src) extends Operation("push", op1)
   case class Pop(op1: Src) extends Operation("pop", op1)
   case class Call(op1: CLibFunc) extends Operation("call", op1)
@@ -94,4 +94,3 @@ object assemblyIR {
   }
 
 }
-