# VGA/SVGA Video Programming--VGA Field Index
Pure VGA/SVGA hardware programming (registers, identification, and otherlow-level stuff.)
Author: Joshua Neal
Keywords: VGA SVGA hardware video programming

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Hardware Level VGA and SVGA Video Programming Information Page
VGA Field Index

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- 256-Color Shift Mode -- Graphics Mode Register
- 8-bit Color Enable -- Attribute Mode Control Register
- 9/8 Dot Mode -- Clocking Mode Register
- Address Wrap Select -- CRTC Mode Control Register
- Alphanumeric Mode Disable -- Miscellaneous Graphics Register
- Asynchronous Reset -- Reset Register
- Attribute Address -- Attribute Address Register
- Attribute Controller Graphics Enable -- Attribute Mode Control Register
- Bit Mask -- Bit Mask Register
- Blink Enable -- Attribute Mode Control Register
- Byte Panning -- Preset Row Scan Register
- Chain 4 Enable -- Sequencer Memory Mode Register
- Clock Select -- Miscellaneous Output Register
- Chain Odd/Even Enable -- Miscellaneous Graphics Register
- Character Set A Select -- Character Map Select Register
- Character Set B Select -- Character Map Select Register
- Color Compare -- Color Compare Register
- Color Don't Care -- Color Don't Care Register
- Color Plane Enable -- Color Plane Enable Register
- Color Select 5-4 -- Color Select Register
- Color Select 7-6 -- Color Select Register
- CRTC Registers Protect Enable -- Vertical Retrace End Register
- Cursor Disable -- Cursor Start Reguster
- Cursor Location -- bits 15-8: Cursor Location High Register, bits 7-0: Cursor Location Low Register
- Cursor Scan Line End -- Cursor End Register
- Cursor Scan Line Start -- Cursor Start Reguster
- Cursor Skew -- Cursor End Register
- DAC Data -- DAC Data Register
- DAC Read Address -- DAC Address Read Mode Register
- DAC State -- DAC State Register
- DAC Write Address -- DAC Address Write Mode Register
- Display Disabled -- Input Status #1 Register
- Display Enable Skew -- End Horizontal Blanking Register
- Divide Memory Address Clock by 4 -- Underline Location Register
- Divide Scan Line Clock by 2 -- CRTC Mode Control Register
- Dot Clock Rate -- Clocking Mode Register
- Double-Word Addressing -- Underline Location Register
- Enable Set/Reset -- Enable Set/Reset Register
- Enable Vertical Retrace Access -- End Horizontal Blanking Register
- End Horizontal Display -- End Horizontal Display Register
- End Horizontal Blanking -- bit 5: End Horizontal Retrace Register, bits 4-0: End Horizontal Blanking Register,
- End Horizontal Retrace -- End Horizontal Retrace Register
- End Vertical Blanking -- End Vertical Blanking Register
- Extended Memory -- Sequencer Memory Mode Register
- Feature Control Bit 0 -- Feature Control Register
- Feature Control Bit 1 -- Feature Control Register
- Horizontal Retrace Skew -- End Horizontal Retrace Register
- Horizontal Sync Polarity -- Miscellaneous Output Register
- Horizontal Total -- Horizontal Total Register
- Host Odd/Even Memory Read Addressing Enable -- Graphics Mode Register
- Host Odd/Even Memory Write Addressing Enable -- Sequencer Memory Mode Register
- Input/Output Address Select -- Miscellaneous Output Register
- Internal Palette Index -- Palette Registers
- Line Compare -- bit 9: Maximum Scan Line Register, bit 8: Overflow Register, bits 7-0: Line Compare Register
- Line Graphics Enable -- Attribute Mode Control Register
- Logical Operation -- Data Rotate Register
- Map Display Address 13 -- CRTC Mode Control Register
- Map Display Address 14 -- CRTC Mode Control Register
- Maximum Scan Line -- Maximum Scan Line Register
- Memory Map Select -- Miscellaneous Graphics Register
- Memory Plane Write Enable -- Map Mask Register
- Memory Refresh Bandwidth -- Vertical Retrace End Register
- Monochrome Emulation -- Attribute Mode Control Register
- Odd/Even Page Select -- Miscellaneous Output Register
- Offset -- Offset Register
- Overscan Palette Index -- Overscan Color Register
- Palette Address Source -- Attribute Address Register
- Palette Bits 5-4 Select -- Attribute Mode Control Register
- Pixel Panning Mode -- Attribute Mode Control Register
- Pixel Shift Count -- Horizontal Pixel Panning Register
- Preset Row Scan -- Preset Row Scan Register
- RAM Enable -- Miscellaneous Output Register
- Read Map Select -- Read Map Select Register
- Read Mode - Graphics Mode Register
- Rotate Count -- Data Rotate Register
- Scan Doubling -- Maximum Scan Line Register
- Screen Disable -- Clocking Mode Register
- Set/Reset -- Set/Reset Register
- Shift Four Enable -- Clocking Mode Register
- Shift/Load Rate -- Clocking Mode Register
- Shift Register Interleave Mode -- Graphics Mode Register
- Start Address -- bits 15-8: Start Address High Register, bits 7-0: Start Address Low Register
- Start Horizontal Blanking -- Start Horizontal Blanking Register
- Start Horizontal Retrace -- Start Horizontal Retrace Register
- Start Vertical Blanking -- bit 9: Maximum Scan Line Register, bit 8: Overflow Register, bits 7-0: Start Vertical Blanking Register
- Switch Sense -- Input Status #0 Register
- Sync Enable -- CRTC Mode Control Register
- Sycnchronous Reset -- Reset Register
- Underline Location -- Underline Location Register
- Vertical Display End -- bits 9-8: Overflow Register, bits 7-0: Vertical Display End Register
- Vertical Retrace -- Input Status #1 Register
- Vertical Retrace End -- Vertical Retrace End Register
- Vertical Retrace Start -- bits 9-8: Overflow Register, bits 7-0: Vertical Retrace Start Register
- Vertical Sync Polarity -- Miscellaneous Output Register
- Vertical Total -- bits 9-8: Overflow Register, bits 7-0: Vertical Total Register
- Word/Byte Mode Select -- CRTC Mode Control Register
- Write Mode -- Graphics Mode Register

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All pages are Copyright © 1997, 1998, J. D. Neal, except where noted. Permission for utilization and distribution is subject to the terms of the FreeVGA Project Copyright License.