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feat: x86 code generation implementation without runtime checking #29

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gk1623 merged 58 commits from asm-gen into master 2025-02-27 18:54:57 +00:00
Conversation 4 Commits 58 Files Changed 14 +578 -223
11 changed files with 578 additions and 223 deletions
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Showing only changes of commit f76b7a9dc2 - Show all commits

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src/main/wacc/backend/asmGenerator.scala
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@@ -170,11 +170,11 @@ object asmGenerator {
chain += stack.drop()
chain += Jump(LabelArg(elseLabel), Cond.Equal)
chain ++= Chain.fromSeq(thenBranch).flatMap(generateStmt)
chain ++= thenBranch.foldMap(generateStmt)
chain += Jump(LabelArg(endLabel))
chain += LabelDef(elseLabel)
chain ++= Chain.fromSeq(elseBranch).flatMap(generateStmt)
chain ++= elseBranch.foldMap(generateStmt)
chain += LabelDef(endLabel)
case While(cond, body) =>
@@ -187,7 +187,7 @@ object asmGenerator {
chain += stack.drop()
chain += Jump(LabelArg(endLabel), Cond.Equal)
chain ++= Chain.fromSeq(body).flatMap(generateStmt)
chain ++= body.foldMap(generateStmt)
chain += Jump(LabelArg(startLabel))
chain += LabelDef(endLabel)
@@ -298,13 +298,13 @@ object asmGenerator {
val argRegs = List(RDI, RSI, RDX, RCX, R8, R9)
val microWacc.Call(target, args) = call
argRegs.zip(args).foreach { (reg, expr) =>
argRegs.zip(args).foldMap { (reg, expr) =>
chain ++= evalExprOntoStack(expr)
chain += stack.pop(reg)
}
args.drop(argRegs.size).foreach { expr =>
chain ++= evalExprOntoStack(expr)
args.drop(argRegs.size).foldMap {
chain ++= evalExprOntoStack(_)
}
chain += assemblyIR.Call(LabelArg(labelGenerator.getLabel(target)))