style: improve code formatting and consistency in typeChecker and assemblyIR

src/main/wacc/backend/assemblyIR.scala

@@ -12,14 +12,15 @@ object assemblyIR {
     case Byte
 
     override def toString = this match {
-      case R64 => "r"
-      case E32 => "e"
+      case R64  => "r"
+      case E32  => "e"
       case Byte => ""
     }
   }
 
   enum RegName {
-    case AX, AL, BX, CX, DX, SI, DI, SP, BP, IP, Reg8, Reg9, Reg10, Reg11, Reg12, Reg13, Reg14, Reg15
+    case AX, AL, BX, CX, DX, SI, DI, SP, BP, IP, Reg8, Reg9, Reg10, Reg11, Reg12, Reg13, Reg14,
+      Reg15
     override def toString = this match {
       case AX    => "ax"
       case AL    => "al"
@@ -59,17 +60,24 @@ object assemblyIR {
     }
   }
 
-  //TODO register naming conventions are wrong
+  // TODO register naming conventions are wrong
   case class Register(size: RegSize, name: RegName) extends Dest with Src {
     override def toString = s"${size}${name}"
   }
-  case class MemLocation(pointer: Long | Register, opSize: SizeDir = SizeDir.Unspecified) extends Dest with Src {
+  case class MemLocation(pointer: Long | Register, opSize: SizeDir = SizeDir.Unspecified)
+      extends Dest
+      with Src {
     override def toString = pointer match {
       case hex: Long     => opSize.toString + f"[0x$hex%X]"
       case reg: Register => opSize.toString + s"[$reg]"
     }
   }
-  case class IndexAddress(base: Register, offset: Int | LabelArg, opSize: SizeDir = SizeDir.Unspecified) extends Dest with Src {
+  case class IndexAddress(
+      base: Register,
+      offset: Int | LabelArg,
+      opSize: SizeDir = SizeDir.Unspecified
+  ) extends Dest
+      with Src {
     override def toString = s"$opSize[$base + $offset]"
   }
 
@@ -111,7 +119,7 @@ object assemblyIR {
       extends Operation(s"j${condition.toString}", op1)
 
   case class Set(op1: Dest, condition: Cond = Cond.Always)
-   extends Operation(s"set${condition.toString}", op1)
+      extends Operation(s"set${condition.toString}", op1)
 
   case class LabelDef(name: String) extends AsmLine {
     override def toString = s"$name:"
@@ -165,14 +173,14 @@ object assemblyIR {
   }
 
   enum SizeDir {
-    case Byte, Word, Unspecified 
+    case Byte, Word, Unspecified
 
     private val ptr = "ptr "
 
     override def toString(): String = this match {
-      case Byte => "byte " + ptr
-      case Word => "word " + ptr
+      case Byte        => "byte " + ptr
+      case Word        => "word " + ptr
       case Unspecified => ""
     }
   }
-}
+}