Imperial-MEng/WACC_37
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Revert "fix: zero-out D32 as well"

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This reverts commit 0eaf2186b6.
This commit is contained in:
Gleb Koval
2025-02-28 18:28:50 +00:00
parent 0eaf2186b6
commit 578a28a222
1 changed files with 3 additions and 3 deletions
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6
src/main/wacc/backend/asmGenerator.scala
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@@ -174,7 +174,7 @@ object asmGenerator {
asm ++= evalExprOntoStack(rhs)
asm ++= evalExprOntoStack(i)
asm += stack.pop(RCX)
asm += Compare(RCX, ImmediateVal(0))
asm += Compare(ECX, ImmediateVal(0))
asm += Jump(labelGenerator.getLabelArg(OutOfBoundsError), Cond.Less)
asm += stack.push(KnownType.Int.size, RCX)
asm ++= evalExprOntoStack(x)
@@ -461,8 +461,8 @@ object asmGenerator {
def stackAlign: AsmLine = And(Register(Size.Q64, SP), ImmediateVal(-16))
private def zeroRest(dest: Dest, size: Size): Chain[AsmLine] = size match {
case Size.Q64 => Chain.empty
case _ => Chain.one(And(dest, ImmediateVal(((BigInt(1) << (size.toInt * 8)) - 1).toInt)))
case Size.Q64 | Size.D32 => Chain.empty
case _ => Chain.one(And(dest, ImmediateVal((1 << (size.toInt * 8)) - 1)))
}
private val escapedCharsMapping = escapedChars.map { case (k, v) => v -> s"\\$k" }