refactor: merge MemLocation with IndexedAddress
This commit is contained in:
@@ -28,7 +28,7 @@ object RuntimeError {
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protected def generateHandler(using labelGenerator: LabelGenerator): Chain[AsmLine] = Chain(
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stackAlign,
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Load(RDI, IndexAddress(RIP, getErrLabel)),
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Load(RDI, MemLocation(RIP, getErrLabel)),
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assemblyIR.Call(CLibFunc.PrintF),
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Move(RDI, ImmediateVal(-1)),
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assemblyIR.Call(CLibFunc.Exit)
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@@ -43,7 +43,7 @@ object RuntimeError {
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protected def generateHandler(using labelGenerator: LabelGenerator): Chain[AsmLine] = Chain(
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Pop(RSI),
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stackAlign,
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Load(RDI, IndexAddress(RIP, getErrLabel)),
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Load(RDI, MemLocation(RIP, getErrLabel)),
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assemblyIR.Call(CLibFunc.PrintF),
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Move(RDI, ImmediateVal(ERROR_CODE)),
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assemblyIR.Call(CLibFunc.Exit)
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@@ -57,7 +57,7 @@ object RuntimeError {
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protected def generateHandler(using labelGenerator: LabelGenerator): Chain[AsmLine] = Chain(
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stackAlign,
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Load(RDI, IndexAddress(RIP, getErrLabel)),
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Load(RDI, MemLocation(RIP, getErrLabel)),
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assemblyIR.Call(CLibFunc.PrintF),
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Move(RDI, ImmediateVal(ERROR_CODE)),
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assemblyIR.Call(CLibFunc.Exit)
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@@ -71,7 +71,7 @@ object RuntimeError {
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protected def generateHandler(using labelGenerator: LabelGenerator): Chain[AsmLine] = Chain(
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stackAlign,
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Load(RDI, IndexAddress(RIP, getErrLabel)),
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Load(RDI, MemLocation(RIP, getErrLabel)),
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assemblyIR.Call(CLibFunc.PrintF),
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Move(RDI, ImmediateVal(ERROR_CODE)),
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assemblyIR.Call(CLibFunc.Exit)
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@@ -86,7 +86,7 @@ object RuntimeError {
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protected def generateHandler(using labelGenerator: LabelGenerator): Chain[AsmLine] = Chain(
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Move(RSI, RCX),
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stackAlign,
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Load(RDI, IndexAddress(RIP, getErrLabel)),
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Load(RDI, MemLocation(RIP, getErrLabel)),
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assemblyIR.Call(CLibFunc.PrintF),
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Move(RDI, ImmediateVal(ERROR_CODE)),
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assemblyIR.Call(CLibFunc.Exit)
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@@ -99,7 +99,7 @@ object RuntimeError {
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def generateHandler(using labelGenerator: LabelGenerator): Chain[AsmLine] = Chain(
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stackAlign,
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Load(RDI, IndexAddress(RIP, getErrLabel)),
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Load(RDI, MemLocation(RIP, getErrLabel)),
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assemblyIR.Call(CLibFunc.PrintF),
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Move(RDI, ImmediateVal(ERROR_CODE)),
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assemblyIR.Call(CLibFunc.Exit)
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@@ -79,12 +79,12 @@ class Stack {
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lines
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}
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/** Get an IndexAddress for a variable in the stack. */
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def accessVar(ident: mw.Ident): IndexAddress =
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IndexAddress(RSP, sizeBytes - stack(ident).bottom)
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/** Get an MemLocation for a variable in the stack. */
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def accessVar(ident: mw.Ident): MemLocation =
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MemLocation(RSP, sizeBytes - stack(ident).bottom, opSize = Some(ident.ty.size))
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def contains(ident: mw.Ident): Boolean = stack.contains(ident)
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def head: MemLocation = MemLocation(RSP, stack.last._2.size)
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def head: MemLocation = MemLocation(RSP, opSize = Some(stack.last._2.size))
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override def toString(): String = stack.toString
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}
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@@ -112,8 +112,8 @@ object asmGenerator {
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Builtin.PrintCharArray,
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Chain(
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stackAlign,
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Load(RDX, IndexAddress(RSI, KnownType.Int.size.toInt)),
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Move(Register(D32, SI), MemLocation(RSI, D32)),
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Load(RDX, MemLocation(RSI, KnownType.Int.size.toInt)),
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Move(Register(D32, SI), MemLocation(RSI, opSize = Some(D32))),
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assemblyIR.Call(CLibFunc.PrintF),
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Xor(RDI, RDI),
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assemblyIR.Call(CLibFunc.Fflush)
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@@ -148,7 +148,7 @@ object asmGenerator {
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stackAlign,
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Subtract(Register(Q64, SP), ImmediateVal(8)),
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Push(RSI),
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Load(RSI, MemLocation(Register(Q64, SP), Q64)),
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Load(RSI, MemLocation(Register(Q64, SP), opSize = Some(Q64))),
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assemblyIR.Call(CLibFunc.Scanf),
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Pop(RAX)
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)
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@@ -167,9 +167,10 @@ object asmGenerator {
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lhs match {
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case ident: Ident =>
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if (!stack.contains(ident)) asm += stack.reserve(ident)
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val dest = Register(ident.ty.size, AX)
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asm ++= evalExprOntoStack(rhs)
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asm += stack.pop(RAX)
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asm += Move(stack.accessVar(ident), RAX)
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asm += Move(stack.accessVar(ident), dest)
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case ArrayElem(x, i) =>
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asm ++= evalExprOntoStack(rhs)
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asm ++= evalExprOntoStack(i)
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@@ -182,12 +183,12 @@ object asmGenerator {
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asm += stack.pop(RCX)
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asm += Compare(EAX, ImmediateVal(0))
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asm += Jump(labelGenerator.getLabelArg(NullPtrError), Cond.Equal)
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asm += Compare(MemLocation(RAX, D32), ECX)
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asm += Compare(MemLocation(RAX, opSize = Some(D32)), ECX)
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asm += Jump(labelGenerator.getLabelArg(OutOfBoundsError), Cond.LessEqual)
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asm += stack.pop(RDX)
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asm += Move(
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IndexAddress(RAX, KnownType.Int.size.toInt, RCX, x.ty.elemSize.toInt),
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MemLocation(RAX, KnownType.Int.size.toInt, (RCX, x.ty.elemSize.toInt)),
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Register(x.ty.elemSize, DX)
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)
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}
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@@ -248,13 +249,17 @@ object asmGenerator {
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expr match {
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case IntLiter(v) => asm += stack.push(KnownType.Int.size, ImmediateVal(v))
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case CharLiter(v) => asm += stack.push(KnownType.Char.size, ImmediateVal(v.toInt))
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case ident: Ident => asm += stack.push(ident.ty.size, stack.accessVar(ident))
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case ident: Ident =>
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val location = stack.accessVar(ident)
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// items in stack are guaranteed to be in Q64 slots,
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// so we are safe to wipe the opSize from the memory location
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asm += stack.push(ident.ty.size, location.copy(opSize = None))
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case array @ ArrayLiter(elems) =>
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expr.ty match {
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case KnownType.String =>
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val str = elems.collect { case CharLiter(v) => v }.mkString
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asm += Load(RAX, IndexAddress(RIP, labelGenerator.getLabelArg(str)))
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asm += Load(RAX, MemLocation(RIP, labelGenerator.getLabelArg(str)))
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asm += stack.push(Q64, RAX)
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case ty =>
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asm ++= generateCall(
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@@ -263,12 +268,12 @@ object asmGenerator {
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)
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asm += stack.push(Q64, RAX)
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// Store the length of the array at the start
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asm += Move(MemLocation(RAX, D32), ImmediateVal(elems.size))
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asm += Move(MemLocation(RAX, opSize = Some(D32)), ImmediateVal(elems.size))
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elems.zipWithIndex.foldMap { (elem, i) =>
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asm ++= evalExprOntoStack(elem)
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asm += stack.pop(RCX)
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asm += stack.pop(RAX)
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asm += Move(IndexAddress(RAX, 4 + i * ty.elemSize.toInt), Register(ty.elemSize, CX))
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asm += Move(MemLocation(RAX, 4 + i * ty.elemSize.toInt), Register(ty.elemSize, CX))
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asm += stack.push(Q64, RAX)
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}
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}
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@@ -289,12 +294,12 @@ object asmGenerator {
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asm += stack.pop(RAX)
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asm += Compare(EAX, ImmediateVal(0))
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asm += Jump(labelGenerator.getLabelArg(NullPtrError), Cond.Equal)
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asm += Compare(MemLocation(RAX, D32), ECX)
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asm += Compare(MemLocation(RAX, opSize = Some(D32)), ECX)
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asm += Jump(labelGenerator.getLabelArg(OutOfBoundsError), Cond.LessEqual)
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// + Int because we store the length of the array at the start
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asm += Move(
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Register(x.ty.elemSize, AX),
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IndexAddress(RAX, KnownType.Int.size.toInt, RCX, x.ty.elemSize.toInt)
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MemLocation(RAX, KnownType.Int.size.toInt, (RCX, x.ty.elemSize.toInt))
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)
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asm += stack.push(x.ty.elemSize, RAX)
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case UnaryOp(x, op) =>
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@@ -308,7 +313,7 @@ object asmGenerator {
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case UnaryOperator.Ord => // No op needed
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case UnaryOperator.Len =>
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asm += stack.pop(RAX)
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asm += Move(EAX, MemLocation(RAX, D32))
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asm += Move(EAX, MemLocation(RAX, opSize = Some(D32)))
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asm += stack.push(D32, RAX)
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case UnaryOperator.Negate =>
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asm += Xor(EAX, EAX)
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@@ -376,7 +381,7 @@ object asmGenerator {
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stack.size == stackSizeStart + 1,
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"Sanity check: ONLY the evaluated expression should have been pushed onto the stack"
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)
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asm ++= zeroRest(MemLocation(stack.head.pointer, Q64), expr.ty.size)
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asm ++= zeroRest(MemLocation(base = stack.head.base, opSize = Some(Q64)), expr.ty.size)
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asm
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}
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@@ -97,22 +97,33 @@ object assemblyIR {
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}
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}
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case class MemLocation(pointer: Register, opSize: Size) extends Dest with Src {
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override def toString =
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opSize.toString + s"[$pointer]"
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}
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case class IndexAddress(
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case class MemLocation(
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base: Register,
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offset: Int | LabelArg,
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indexReg: Register = Register(Size.Q64, RegName.AX),
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scale: Int = 0
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offset: Int | LabelArg = 0,
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// scale 0 will make register irrelevant, no other reason as to why it's RAX
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scaledIndex: (Register, Int) = (Register(Size.Q64, RegName.AX), 0),
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opSize: Option[Size] = None
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) extends Dest
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with Src {
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override def toString = if (scale != 0) {
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s"[$base + $indexReg * $scale + $offset]"
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} else {
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s"[$base + $offset]"
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def copy(
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base: Register = this.base,
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offset: Int | LabelArg = this.offset,
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scaledIndex: (Register, Int) = this.scaledIndex,
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opSize: Option[Size] = this.opSize
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): MemLocation = MemLocation(base, offset, scaledIndex, opSize)
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override def toString(): String = {
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val opSizeStr = opSize.map(_.toString).getOrElse("")
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val baseStr = base.toString
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val offsetStr = offset match {
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case 0 => ""
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case off => s" + $off"
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}
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val scaledIndexStr = scaledIndex match {
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case (reg, scale) if scale != 0 => s" + $reg * $scale"
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case _ => ""
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}
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s"$opSizeStr[$baseStr$scaledIndexStr$offsetStr]"
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}
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}
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@@ -145,8 +156,7 @@ object assemblyIR {
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case class Pop(op1: Src) extends Operation("pop", op1)
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// move operations
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case class Move(op1: Dest, op2: Src) extends Operation("mov", op1, op2)
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case class Load(op1: Register, op2: MemLocation | IndexAddress)
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extends Operation("lea ", op1, op2)
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case class Load(op1: Register, op2: MemLocation) extends Operation("lea ", op1, op2)
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// function call operations
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case class Call(op1: CLibFunc | LabelArg) extends Operation("call", op1)
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