import org.scalatest.funsuite.AnyFunSuite
import wacc.assemblyIR._
import wacc.assemblyIR.Size._
import wacc.assemblyIR.RegName._

class instructionSpec extends AnyFunSuite {

  val named64BitRegister = Register(Q64, AX)

  test("named 64-bit register toString") {
    assert(named64BitRegister.toString == "rax")
  }

  val named32BitRegister = Register(D32, AX)

  test("named 32-bit register toString") {
    assert(named32BitRegister.toString == "eax")
  }

  val scratch64BitRegister = Register(Q64, R8)

  test("scratch 64-bit register toString") {
    assert(scratch64BitRegister.toString == "r8")
  }

  val scratch32BitRegister = Register(D32, R8)

  test("scratch 32-bit register toString") {
    assert(scratch32BitRegister.toString == "r8d")
  }

  val memLocationWithRegister = MemLocation(named64BitRegister, opSize = Some(Q64))

  test("mem location with register toString") {
    assert(memLocationWithRegister.toString == "qword ptr [rax]")
  }

  val memLocationFull =
    MemLocation(named64BitRegister, 32, (scratch64BitRegister, 10), Some(B8))

  test("mem location with all fields toString") {
    assert(memLocationFull.toString == "byte ptr [rax + r8 * 10 + 32]")
  }

  val immediateVal = ImmediateVal(123)

  test("immediate value toString") {
    assert(immediateVal.toString == "123")
  }

  val addInstruction = Add(named64BitRegister, immediateVal)

  test("x86: add instruction toString") {
    assert(addInstruction.toString == "\tadd rax, 123")
  }

  val subInstruction = Subtract(scratch64BitRegister, named64BitRegister)

  test("x86: sub instruction toString") {
    assert(subInstruction.toString == "\tsub r8, rax")
  }

  val callInstruction = Call(CLibFunc.Scanf)

  test("x86: call instruction toString") {
    assert(callInstruction.toString == "\tcall scanf@plt")
  }
}
